Master/slave flipflops in the form of so-called latches are required for a large number of applications. By way of example, they may be used as flipflops with feedback in the form of a frequency divider circuit in a transmission path for radio-frequency signals. They are used to divide a signal by a factor of two, and can also be used to produce signals with a phase shift of 90°. One example of a transmission path with a frequency divider circuit which is suitable for the GSM mobile radio standard is shown in prior art FIG. 5. The GSM mobile radio standard uses GMSK modulation for modulation of signals. In this case, the information to be transmitted is coded only in the phase and/or the frequency of the signal. The amplitude of the modulated signal does not vary in this case.
In modern circuit designs for phase modulation or frequency modulation, a modulation signal is supplied directly to one input MODIN of the phase locked loop PLL. The phase locked loop varies the output signal OUT from a voltage controlled oscillator VCO in accordance with the modulation signal at the modulation input MODIN. The output signal from the voltage controlled oscillator in transmitters of this design is accordingly modulated directly with the data to be transmitted.
In order to produce the output signal at the correct transmission frequency in the GSM800/900 and/or GSM1800/1900 frequency band, the frequency of about 4 GHz of the output signal OUT from the voltage controlled oscillator VCO is divided by a downstream frequency divider circuit or circuits. It is then amplified to the desired output power. In order to minimize the phase noise in the overall transmission path, it is expedient for the signal waveform throughout the entire signal path, and hence also the output signal, to have as square a waveform as possible. At the same time, the duty ratio of the output signal should have the value 0.5 or 50% in order in this way to obtain the maximum output power at the appropriate carrier frequency. If the duty ratio is not 50%, harmonic frequency components are produced, which reduce the output power of the useful signal at the carrier frequency.
A local oscillator output signal OUT with an incorrect duty ratio is compensated for in the frequency divider circuits, provided that they do not themselves produce an error in the duty ratio.
Prior art FIG. 7 shows one known frequency divider, which is formed by a master/slave flipflop. The flipflop circuit in each case contains two charge buffers 100, which are in the form of differential amplifiers. These are coupled to bistable multivibrator circuits 200, and amplify the state of the respective downstream multivibrator circuit.
In the known exemplary embodiment, both the differential amplifier transistors and the transistors in the bistable multivibrator circuits are coupled via resistors 99 to the supply potential VDD at the supply connection 16. The multivibrator circuits and the amplifiers are activated alternately via a push-pull signal at the clock inputs 15 and 14.
During operation of the frequency divider circuit, one of the two transistors in the respective multivibrator circuit is charged to an appropriate supply potential via the resistors 99 on a rising edge of a clock signal which is applied to one of the clock inputs 14 or 15. The respective gate/source capacitance together with the upstream resistance results in a charging time which leads to a change in the duty ratio of the output signal.
Prior art FIGS. 6A-6D show various graphs in order to illustrate this problem. The graph element in FIG. 6B shows the output voltage of the output 12a plotted against time. As can be seen, the charging time from a low level to a high level has a different duration depending on the resistance values. In contrast to this, the fall time is approximately the same.
The rise time of the output signal in the graph element of FIG. 6B can be approximated by an exponential function with a time constant which is governed by the value of the resistance and by the corresponding gate/source capacitance in the multivibrator circuits 200 in the master/slave flipflop.
In order to improve the flank grading, which leads to an improvement in the duty ratio, it is possible to reduce the value of the resistor 99. The embodiments illustrated in the FIGS. 6B and 6C show three different resistances. These lead to the duty ratio being improved from 57% to 51%. In contrast, the graph in FIG. 6D, however, shows a considerable rise in the supply current, from 18 to 27 mA.